Bharath Reddy
RTL Hardware Engineer
- Role
- Senior Hardware Design Engineer at AMD
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Bharath Reddy
working on RTL Design FPGA architecture worked with protocols AXI/AVMM/i2clanguages known verilog/Sstem Verilog, system-cworked on PCIE, TOD, QSFP modules. Worked on PYTHON/C++ and networking(NXOS)Knowledge on data center networkingknowledge on chef, puppet and Netconf Worked on JAVAknowledge on ASIC Components(Analog)
Experience
Senior Hardware Design Engineer
Jun 2023 — Present · Hyderabad, IN
Education
Vellore Institute of Technology
Master's Degree
2012 — 2014
Sri Krishnaveni Talent School, Vijayawada
High School
2005 — 2006
Skills
- Json
- Data Structures
- C
- C++
- Netconf
- System Verilog
- Analog Circuit Design
- Embedded C
- Xml
- Automation
- Object-Oriented Programming (Oop)
- Data Center
- Java
- Embedded Systems
- Python
- Ansible
- Device Drivers
- Internet Protocol Suite (Tcp/Ip)
- Linux
- Algorithms
- Transmission Control Protocol (Tcp)
- Fpga
- Operating Systems
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