Bharath Koodly
Senior CPU Microarchitect
- Role
- Aheadcomputing
- Location
- Hillsboro, OR, US
- LinkedIn followers
- 500 followers
About Bharath Koodly
CPU RTL Design Engineer at an early stage startup.Bharath has experience in RTL Design, Design Verification and PostSi Validation. He is well versed in CPU Architecture, especially Cache Subsystem. He has previously worked at Intel and Ampere Computing.Specialties: Microprocessors, Cache Hierarchy, System Verilog, Assembly Language x86, Debug, C, C++
Experience
Present
Education
University of Florida
MS, Electrical and Computer Engineering
2008 — 2010
Visvesvaraya Technological University
Bachelor of Engineering, Telecommunication Engineering
2002 — 2006
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