Bhanu Prakash Yakkaluri

Rtl Design Manager @MosChip®

Hyderabad, TG, IN
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Jul 2024 — Present

Rtl Design Manager @MosChip®

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EDUCATION

2003 — 2007

VTU

B.E, Electronics &Communications

2008 — 2010

Manipal Institute of Technology

M.S, VLSI-CAD

SKILLS

Open Verification MethodologyDebuggingAsicSpiAmba AhbAhbModelsimArm ArchitectureDigital ElectronicsCIntegrated Circuit DesignPerlEmbedded SystemsApplication-Specific Integrated Circuits (Asic)Rtl DesignUniversal Verification Methodology (Uvm)Digital DesignXilinxSystemverilogLogic SynthesisUvmNc-VerilogRtl CodingVerilogUartArmVcsNcsimVhdlUsbLogic DesignFunctional VerificationI2c

ABOUT BHANU PRAKASH YAKKALURI

Strong knowledge on Verilog, VHDL. Knowledge and proficiency in scripting languages like PERL. Knowledge on ARM Cortex A9 Power management Unit. Good Knowledge on ARM Memory controllers like PL330 (DMA Controller) Good Knowledge on AMBA Bus Architectures like AXI-3, APB, AHB2, AHB-3 Lite. Knowledge and proficiency in C, FILE HANDLING and Data structures. Knowledge on Assembly programming for ARM Components (DMA Programming). Knowledge on register configuration in C based testcases. Exposure to synthesis and Design Compiler. Exposure to System verilog concepts like Randomization, Interface, OOP’s. Exposure to verification methodologies like VMM, OVM. Experience in BFM development and top level verification using Verilog and VHDL.

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Bhanu Prakash Yakkaluri — Rtl Design Manager at MosChip® in Hyderabad, TG, IN | Unifers