Beenal Mavani

About Beenal Mavani

As a DFx Engineering Manager at Intel Corporation, I lead the design for test(DFT)/design for debug(DFD) teams towards delivering successful DFx for system-on-chip (SoC) projects. With over 15 years of experience in the field, I have developed strong skills in project management, microarchitecture, and SOC integration. I am passionate about driving innovation and excellence in the engineering field, and I am always eager to learn new technologies and techniques. My goal is to contribute to the success of Intel and the industry as a whole.

Experience

1. Dfx Engineering Manager

   Intel

   Nov 2024 — Present · OR, US

   Lead DFx design and val team.

Education

• Universiti Teknologi Malaysia

  Masters in Engineering , Electronics-Computer and Microelectronics

  2011 — 2013

• Universiti Teknologi Malaysia

  Bachelor of Engineering (B.Eng.), Electrical Engineering(Computer)

  2000 — 2005

Skills

• Logic Synthesis
• Modelsim
• Rtl Design
• Debugging
• Public Speaking
• Soc
• Electronics
• Asic
• Timing Closure
• System on a Chip (Soc)
• Embedded Systems
• Systemverilog
• Atpg
• Conformal Lec
• Vhdl
• Dft
• Verilog
• Logic Vision
• Logic Design
• Static Timing Analysis
• Synopsys Tools
• Semiconductors