Bathula Pavan Kalyan

About Bathula Pavan Kalyan

Analog Layout Design Engineer with hands-on experience in optimizing integrated circuits (ICs) using advanced 28nm, 16nm and 7nm and 3nm technology nodes. Proficient in creating floorplans, device matching, parasitic extraction, and LVS/DRC checks. Skilled in using industry-standard tools like Cadence Virtuoso, Mentor Graphics Calibre. understanding of analog circuit concepts, including current mirrors, differential pairs, and OPAMPs and Blocks of PLL, BGR,ESD,LEVEL SHIFTERS, LDO TOP. Strong knowledge of Layout constraints such as Matching, Shielding, Antenna effect, Well Proximity Effect, Deep Nwell, Latchup, EM and IR.Worked on 28nm,16nm and 7nm and 3nm technologies and have good Knowledge of Analog Layout Concepts (Antenna Effect, Latchup, Cross-talk, Shielding, WPE, Matching Techniques,EMIR, RESISTANCE AND CAPACITANCE CHECKS ) & Have good Knowledge of CMOS Fundamentals and Fabrication Process.Proficient in Cadence Virtuoso Layout Editor XL with hands-on experience in digital and analog layout design.>>Solid understanding of fabrication processes, CMOS With a deep understanding of LOD, STI, Well proximity effects, and Deep N-well concepts.>>Skilled in matching techniques, current mirrors, and differential amplifiers, bias circuits LDO.>>Hands on Projects include digital layout designs of all STD cells, LDO TOP, BGR, ESD PRIMARY AND SECONDARY ALONG WITH CLAMPING CIRCUIT, LEVEL SHIFTERS, CURRENT BIASING CIRCUIT, SUB BLOCKS OF PLL,V2I and ofcourse ( Current Mirror, Differential Pair, Op-amp,).>>Expertise in physical verification (LVS and DRC).

Experience

1. Analog Layout Engineer

   BITSILICA

   Feb 2026 — Present · Bengaluru, IN

Education

• Sri Chaitanya College of Education

  High School Diploma

  2016 — 2016

• Aditya Degree Colleges

  Bachelor of Science, Electronics

• Oxford Telecommunications Ltd

  High School Diploma

  2012 — 2012

• GITAM Deemed University

  Master's degree, Electronics