Bastien Giraud
Memory Design Research Engineer in Advanced Technologies @CEA
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WORK HISTORY
Memory Design Research Engineer in Advanced Technologies @CEA
Low power digital and SRAM circuit design in BULK and fully depleted SOI technology (28nm & 14nm)- Study of novel FDSOI device architectures- Design of innovative digital and SRAM circuits in sub-32nm FDSOI technology- Industrial Design Platform porting from BULK to FDSOI, leading to strong interactions with process, device, cad2mask, DK, SRAM and digital design teams- SRAM memory and Standard cell characterization in 28nm FDSOI technologyStrong collaboration with STMicroelectronics and IBM allianceInnovative SRAM cut operating in specific environmentNon volatile memory cut and crossbar using ReRAM technologies such as OxRAM and CBRAM.15 strategic patents on memory design
SKILLS
ABOUT BASTIEN GIRAUD
Research Engineer in Memory Circuit Design
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