Baskar Sankar
Senior Physical design Engineer
- Role
- Senior Physical Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Baskar Sankar
Experience in PnR/Logic Synthesis/Formal Verification/Timing closure of 7/10/14/28/40/65nm technology process.Worked in Pnr for 2 tapeouts worked SOC Signoff domain in Formal verication, Power aware FV. Multi Corner/Multi Mode STA Analysis, SI and crosstalk/noise analysis Develop/Enhances STA design Methodology using adaptive flow (OCV, DMSA) Synthesis with hierarchical design approach, top-down design, budgeting, timing convergence Develop and enhanced Timing ECO’s flow to closure of setup/hold/DRC in DMSA mode. Formal verification using Conformal LEC.Tools :PrimeTime(PT), PT-Si, Design Compiler (DCT).
Experience
Senior Physical Design Engineer
Apr 2024 — Present · Bengaluru, IN
Education
Anna University Chennai
Bachelor's degree, Electrical, Electronics and Communications Engineering
Skills
- Formal Verification
- Vlsi
- Static Timing Analysis
- Tcl
- Perl
- Verilog
- Physical Design
- Asic
- Unix
- Primetime
- Timing Closure
- Logic Synthesis
- Jtag
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