Basavaraj Hiremath.
Custom CPU SRAM Layout -Meta, Ex - Rivos Inc - Broadcom - Samsung |
- Role
- Silicon Engineer (Sram - Layout) at Meta
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Basavaraj Hiremath.
Experienced Layout Design Engineer 15+ years of experience with a demonstrated history of working in the semiconductors industry. Skilled in Memory Layout (compiler/custom) and Leading a team/Project Management/Building Team. Strong engineering professional with a M.Tech focused in VLSI Design & Embedded System from Visvesvaraya Technological University.
Experience
Silicon Engineer (Sram - Layout)
Dec 2025 — Present · Bengaluru, IN
Education
Visvesvaraya Technological University
M.Tech
2007 — 2009
HIT, Nidasoshi, Belagavi
B.E
2002 — 2006
Skills
- Cadence Virtuoso
- Digital Circuit Design
- Ic
- Unix
- Rtl Verification
- Analog
- Layout
- Asic
- Embedded C
- Systemverilog
- Mixed Signal
- Semiconductors
- Usb
- Mips
- Vhdl
- Ddr
- Power Management
- Analog Circuit
- Vlsi
- Soc
- Embedded Systems
- Eda
- Verilog
- Processors
- Device Drivers
- Cmos
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