Basant Goyal
RTL Design Engineer at Intel Corporation
- Role
- Rtl Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Basant Goyal
I am working on developing and implementing RTL designs that meet the stringent requirements of A-PHY(MIPI protocol), Universal Chiplet Interconnect Express (UCIE) protocol.Lead the RTL DESIGN team OF AMS IP (LCPLL, RCOSC, GPIO, etc.) along with its verification, DFT, UPF Models(multi-voltage design), integrations with SOC and timing closure.Experienced RTL Lead specializing in IP release process to various customers, LINT, CDC analysis, and VCLP checks. Adept at ensuring design integrity and compliance with industry standards through meticulous verification processes and comprehensive quality assurance practices.Experienced in analog layout design, specializing in creating high-performance, reliable, and manufacturable circuit layouts of Foundational IP\'s and its automation using SKILL programming language. Experienced in tools and flow methodology/automation using PERL, TCL and UNIX scripting.Deep understanding of system verilog.Tools knowledge: Verdi, Spyglass, virtuoso, git, primetime, vcs etc.
Experience
Rtl Design Engineer
Jul 2020 — Present · Bengaluru, IN
Education
Chandigarh Engg College, Landran
Engineer’s Degree, Electronics and Communications Engineering
2011 — 2015
National Institute of Technology Karnataka
Master of Technology - MTech, VLSI Design
2017 — 2019
Skills
- Expert at Electronics Devices and Their Study
- Powerpoint
- Microsoft Excel
- Customer Service
- Research
- Leadership
- Good Hand in Technical Skills of Ece
- Microsoft Office
- Management
- Microsoft Word
- Project Management
- Public Speaking
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