Balraj Arunachalam

Front End Wafer Level Reliability and Characterization Engineer @STMicroelectronics

Grenoble, FR
MOBILE NUMBERS
+91 *********19

Signup · Get unlimited contacts

WORK HISTORY

May 2023 — Present

Front End Wafer Level Reliability and Characterization Engineer @STMicroelectronics

View department →

Crolles, FR

Silicon photonics, Microelectronic devices reliability and characterisation in wafer level tests

EDUCATION

N/A

Université Grenoble Alpes

Doctor of Philosophy - PhD, Nano Electronique et Nano Technologies (NENT)

N/A

I2IT - School of Interdisciplinary Sciences and Technology (SOST)

Advanced Postgraduate program in Nanoelectronics, Nanoelectronics

1991 — 2005

Loyola Matriculation Higher Secondary School, Kodambakkam (Chennai, India)

Higher secondary education, Maths, Physics, Chemistry, Computer Science

N/A

Indian Institute of Technology, Bombay

Doctor of Philosophy - PhD, Energy Science and Engineering

N/A

Grenoble INP - Phelma

Master's degree - (M1), Functional Advanced Materials Engineering (FAME), Material Science and Engineering

N/A

Thangavelu Engineering College

Bachelor of Engineering - BE, Electronics and Communication Engineering

N/A

Grenoble INP - Phelma

Master's degree - (M2), Engineering of Functional (EFM), Semiconductor Materials, Material Science and Engineering

SKILLS

C++Business AnalysisVerilogSiliconSolar CellsJavascriptSputteringThin FilmsMicrocontrollersVhdlSimulationsData AnalysisCSqlData MiningMatlab

ABOUT BALRAJ ARUNACHALAM

Expertise in simulation, fabrication and characterization crystalline silicon solar cell (large area), photodiodes and solid state devices. Challenging in work with a dynamic team of innovators and researchers, open to learn new skills and work on challenging tasks that enhances my knowledge and creativity. I pursue a career in research and development and I\'m currently pursuing a thesis (PhD) to support for my career and research work interest.

This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.

Balraj Arunachalam — Front End Wafer Level Reliability and Characterization Engineer at STMicroelectronics in Grenoble, FR | Unifers