Balaviswanath Bondapalli
Project Engineer at Wipro Technologies Pune
- Role
- Project Engineer at Wipro
- Location
- Pune, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Balaviswanath Bondapalli
Verification Languages - Verilog, System Verilog. Verification Methodology -…
Experience
Project Engineer
Jan 2015 — Present · Pune, IN
Verification: Constraint driven Methodology, Assertion based verification, and Coverage driven verificationmethodologies: VTB,SVTB, UVMTools : Synopsys Vcs, Cadence NCsim.
Skills
- Vlsi
- Modelsim
- Questasim
- System on a Chip (Soc)
- Fpga
- Ncsim
- Powerpoint
- System Verilog
- Digital Electronics
- Asic
- C
- Matlab
- Microsoft Office
- Functional Verification
- Verilog
- Embedded Systems
- Electronics
- Linux
- Ubuntu
- Perl
- Cadence
- Programming
- Windows
- Microsoft Excel
- Rtl Design
- Microcontrollers
- Microsoft Word
- Debugging
- Systemverilog
- Vhdl
- Uvm
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