Balaji Vura
SOC Design Manager at Intel Corporation
- Role
- Senior Manager, Asic Development Engineering - Physical Design at WD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
Experience
Senior Manager, Asic Development Engineering - Physical Design
Nov 2024 — Present
Education
Osmania University
BE
Skills
- Verilog
- Debugging
- Static Timing Analysis
- Vlsi
- Ic
- Physical Design
- Tcl
- Perl
- Eda
- Cmos
- Soc
- Timing Closure
- Asic
- Integrated Circuit Design
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.