Balaji Jagannath
Component Design Engineer at Intel
- Role
- Component Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Component Design Engineer
Jun 2012 — Present · Bangalore, IN
Education
Manipal Academy of Higher Education
MS
2008 — 2010
Skills
- Debugging
- Static Timing Analysis
- Floorplanning
- Vlsi
- Unix
- Verilog
- System on a Chip (Soc)
- Physical Design
- Rtl Design
- Soc
- Cmos
- Asic
- Application-Specific Integrated Circuits (Asic)
- Ic
- Semiconductors
- Very-Large-Scale Integration (Vlsi)
- Mixed Signal
- Embedded Systems
- Eda
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