Balagopendra Rao Mannava
ASIC Physical Design Engineer/AMD ODC/Soctronics/VEDA IIT
- Role
- Engineer 1 at Soctronics
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
Experience
Engineer 1
Dec 2023 — Present · Hyderabad, IN
Worked on ASIC Physical Design for advanced nodes, contributing to two 3nm AMD projects, with responsibilities including floorplanning, placement, CTS, routing, timing closure, physical verification and IREM. Resolved setup and hold violations, supported signoff and tapeout, and collaborated with cross-functional teams.
Education
Vasireddy Venkatadri International Technological University
Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering
VEDA IIT
Masters of Science - MS, VLSI Engineering
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