Ayush Shrivastava
- Role
- Senior Sram Circuit Design Engineer at NVIDIA
- Location
- Hillsboro, OR, US
- LinkedIn followers
- 500 followers
About Ayush Shrivastava
Memory IP Design Engineer at Intel
Experience
Senior Sram Circuit Design Engineer
Oct 2023 — Present
Skills
- C
- Data Structures
- Systemverilog
- Core Java
- Gem5
- Java
- Asic Design
- Microsoft Office
- Vlsi
- System Verilog
- Web Services
- Java Enterprise Edition
- Cadence
- C++
- Cadence Virtuoso Layout Editor
- Embedded Systems
- Orcad Capture Cis
- Matlab
- Asic
- Very-Large-Scale Integration (Vlsi)
- Spring
- Xml
- Perl
- Algorithms
- Verilog
- Mips Assembly Language
- Cadence Virtuoso
- Embedded C
- Concept Hdl
- Testing
- Telecommunications
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