Aybars Onel

Senior Layout Engineer @Renesas Electronics

Swindon, GB

EMAILS

[email protected]

MOBILE NUMBERS

+91 *********19

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WORK HISTORY

Jan 2022 — Present

Senior Layout Engineer @Renesas Electronics

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Swindon, GB

Renesas Electronics aquired Dialog Semiconductor

EDUCATION

1993 — 1997

Istanbul Technical University

BSc, Electronics and Communication Engineering

1997 — 2000

Boğaziçi University

MSc, Microelectronics

SKILLS

Digital Ic DesignRtl VerificationVhdlVerilogSystemverilogUvmCNcsimAsicFpgaSpyglassAutonomyStrongly Self-MotivatedFlexibilityChange ManagementTeamworkDisciplineResult OrientedRtl DesignSimulationsLogic SynthesisOpen Verification MethodologyTestingDigital Signal ProcessorsModelsimIc LayoutField-Programmable Gate Arrays (Fpga)Integrated Circuit DesignIntegrated Circuits (Ic)Universal Verification Methodology (Uvm)Cadence VirtuosoDesign for ManufacturingMentor Graphics CalibreDesign Rule Checking (Drc)Layout Versus Schematic (Lvs)Antenna DrcElectrical Rule Check (Erc)Constraint Based RoutingGuardringParasitic Extraction

ABOUT AYBARS ONEL

Dynamic and self-motivated professional with more than 10 years’ experience in Layout Design and over 12 years’ experience in Digital IC and System-On-Chip Design. Mastered most of the phases of digital ASIC and FPGA design and verification. Confident and aspirant to continue his career as an Analog/RF Layout Engineer. Experienced in CMOS process technologies at 250nm, 150nm, 130nm, 90nm, 65nm, 45/40nm and 28nm FDSOI. Passionate, result oriented individual with a can-do attitude. Either able to work individually or as part of a larger team. Extensive remote-team experience in international microelectronics companies.

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