Avishek Ganguly
Lead Design Engineer @NXP Semiconductors
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WORK HISTORY
Lead Design Engineer @NXP Semiconductors
Bengaluru, IN
Working in high speed interface group, looking into biasing blocks. Working on high PSR based LDOs, very fast transient response based regulators and associated biasing circuity. Worked on high speed serial links, P2S and associated circuitry
EDUCATION
Indian Institute of Engineering Science and Technology (IIEST), Shibpur
Masters of Technology in VLSI Design
ABOUT AVISHEK GANGULY
Experienced mixed signal circuit design engineer with a demonstrated history of working in SERDES and memory relatex analog blocks. Was involved in the mixed signal design of different serdes blocks namely, CTLE and VGA. Aided in the development of adaptation engines (digital blocks) for different equalizers. Worked extensively in the mixed signal design of temperature independent oscillators and critical delay generation circuits for emerging memory applications.Presently involved in the design and verfication of LDO, bandgap references and other bias blocks. Also involved in PLL top simulations.
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