Aviral Agarwal
- Role
- Design Verification Engineer at Apple
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Design Verification Engineer
Jan 2021 — Present
Skills
- Synopsys Tools
- Rtl Design
- Groovy
- Scrum
- Cadence Encounter
- Microsoft Excel
- Matlab
- Soapui
- Algorithms
- Electronics
- Linux
- Microsoft Office
- Microsoft Word
- Sql
- Semiconductors
- Jira
- Vhdl
- Nc-Verilog
- Test Automation
- Microsoft Powerpoint
- Java
- Agile Testing
- Python
- C++
- Testing
- Verilog
- English
- Windows
- Agile Methodologies
- Embedded Systems
- Asic
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