Avinash Somanathan
PPA Design Engineer at Intel Foundry Services
- Role
- Power Performance Area Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Avinash Somanathan
I am passionate about building devices that help people and are at the cutting edge of consumer devices. I am currently a Physical design engineer in Samsung’s GPU team. I work primarily in PPA analysis and feasibility studies, do RTL feedback, own tiles from Synthesis to PnR to Signoff. I got a Masters degree in Electrical Engineering at the University of Southern California. I have extensive experience and course work in Digital design, CPU Design, CAD tool design, DFT and Embedded Firmware development. I spent summer 2018 at Medtronic, in the Technology Development team, evaluating power consumption and enabling features in the next gen silicon node. I was involved in all phases of design from RTL changes to Power Analysis, STA and standard cell library optimizations.I was a TA for USC\'s flagship Computer Architecture course EE457 and am currently intern with GPU Integration and Power Analysis team at Samsung ACL. I am open to full time opportunities starting May 2019
Experience
Power Performance Area Design Engineer
Nov 2021 — Present · Austin, TX, US
Education
Vivekanand Education Society's Institute Of Technology
Bachelor of Engineering (B.E.), Instrumentation Technology
2011 — 2015
University of Southern California
Master of Science - MS, Electrical Engineering
2017 — 2019
Skills
- New Business Development
- Digital Signal Processors
- C
- Marketing Strategy
- Analog Circuit Design
- C++
- Biological Monitoring
- Java
- Vhdl
- Social Media Marketing
- Hardware
- Fpga
- Labview
- Matlab
- Medical Devices
- Sql
- Digital Electronics
- Embedded Systems
- Signal Processing
- Microsoft Office
- Vlsi
- Microcontrollers
- Analog
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