Avinash Badanikai Jain
Analog I/O layout designer at Intel Corporation
- Role
- Analog Io Layout Design at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
Experience
Analog Io Layout Design
Jan 2021 — Present · Bengaluru, IN
Worked on different types of GPIO layout development from scratch, floor plan,pin power plan and continuously engage with SOC team to make physical integration easy.Worked on 1v,1.2v and 1.8v gpio.With solid understanding of ESD,HV flows.Presently working on DDRIO layout,owning RX layout design of DATA, CLK,CMD and DQS strobe CBB
Education
K K C primary and high school, sadalga
Kannada Medium
Alva's College, Moodabidri, Karnataka
PCME
2011 — 2013
Bangalore Institute of Technology
Bachelor of Engineering - BE, Electronics and Communication
2013 — 2017
Indian Institute of Technology, Roorkee
Master of Technology - MTech, VLSI
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