Avijit Naskar

About Avijit Naskar

Specialities: Next gen DDR sub-system, ARM based NOC interconnect, and System…

Experience

1. Principal Engineer Manager

   Qualcomm

   Dec 2023 — Present · Bengaluru, IN

Education

• Indian Institute of Engineering Science and Technology, Shibpur

  B.E. (Electronics & Telecommunications)

  1994 — 1998

• Birla Institute of Technology and Science, Pilani

  MS

  2002 — 2004

Skills

• Timing Closure
• Ic
• Device Drivers
• Amba Ahb
• Soc
• Cna Chip Architecture Knowledge
• Simulations
• Pcie
• Ethernet
• Fc/Fcoe Protocol Fw Model in System Verilog
• Vmm
• Vlsi
• Microarchitecture
• Mentoring and Leadership Knowledge for Asic Design and Verif Team
• Logic Synthesis
• Arm Processor Architecture Knowledge
• Worked Experience From Micro-Arch Totapout
• Static Timing Analysis
• Functional Verification
• Arm
• Rtl Design
• Random, Directed and Assertion-Based Verification Methodologies and Vmm
• Field-Programmable Gate Arrays (Fpga)
• System Level Verif Env Build
• Very-Large-Scale Integration (Vlsi)
• Systemverilog
• Debugging
• Verilog
• Application-Specific Integrated Circuits (Asic)
• System on a Chip (Soc)
• Fpga
• Asic
• Embedded Systems