Atif Afzal
SoC & GPU Verification Specialist | Senior Silicon Design Engineer @ AMD India | Multi-Chiplet AI Server SoCs | SystemVerilog • UVM • C-DPI • Python • Perl | Automation-Driven DV
- Role
- Senior Silicon Design Engineer at AMD
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Atif Afzal
I am a SoC & GPU Design Verification Engineer with 6+ years of experience in block-level…
Experience
Senior Silicon Design Engineer
Feb 2025 — Present · Bengaluru, IN
Reset Verification: Verified reset functionality across all chiplets in a multi-chiplet AI server SoC, ensuring robust operation across multiple partition modes supported by the architecture.SoC-Level Environment: Worked in a C-based SoC verification environment, collaborating closely with UVM-based testbenches to validate system-level reset and bring-up flows.DPI-Driven Sequences: Used existing DPI (Direct Programming Interface) calls to drive transactions via C-based sequences, enabling synchronized communication between C test stimulus and UVM components.Cross-Functional Collaboration: Partnered with design, architecture, and DV teams to debug and resolve reset-related issues, ensuring on-time delivery of verification milestones.Debug & Analysis: Utilized advanced waveform debug tools and log analysis to trace cross-chiplet reset behavior, identify root causes, and propose fixes in both RTL and stimulus.Key Skills: SoC Verification, UVM, SystemVerilog, C Programming, DPI, Multi-Chiplet Architecture, Partition Mode Testing, Reset Sequences, Debug & Root-Cause Analysis, AI Server SoCs.
Education
Birla Institute of Technology and Science, Pilani
Master of Technology - MTech
2022 — 2024
St Basil's School Basti
Matriculation
2011 — 2012
Dr. A.P.J. Abdul Kalam Technical University
Bachelor of Technology
2014 — 2018
St. Basil School Basti
Senior Secondary Certificate
2013 — 2014
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