Aswathy Suresh Kumar
VLSI Design Verification Engineer at Tech Mahindra
- Role
- Engineer at Tech Mahindra
- Location
- Kochi, KL, IN
- LinkedIn followers
- 500 followers
About Aswathy Suresh Kumar
Hey! I am Aswathy, an ASIC Design Verification Engineer with experience specializing in Pre-Silicon Validation of IPs based on USB 3.2,eSPI protocols. Currently working on verification of PCIE Gen 6 IP.My expertise lies in diagnosing regression failures,effectively implementing test fixes and debugging System Verilog assertions.I have successfully contributed to the development of scoreboard predictor logic for early boot-up cycles in the eSPI protocol.My experience extends to utilizing verification methodologies such as UVM/OVM, and I am well-versed in Hardware Verification Languages (HVL) like System Verilog and Hardware Description Language (HDL) such as Verilog.Furthermore, I have practical experience with EDA tools specifically Synopsys Verdi and Synopsys VCS, which have been instrumental in my verification processes.
Experience
Engineer
Feb 2024 — Present · Kochi, IN
Education
Mar Athanasius College of Engineering
Bachelor of Technology - BTech
2016 — 2020
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