Astitva Johri

Analog Design Hackathon Finalist (CDAC,C2S,Meity)2025| Graduate Engineer Trainee At Sidwal (Amber Enterprises Pvt Ltd) | Pursuing B.Tech In Electronics and Communication Engineering| Ex-Research Intern At LNMIITJaipur|

Role
Graduate Engineer Trainee at Sidwal
Location
Mathura, UP, IN
LinkedIn followers
500 followers

About Astitva Johri

Astitva Johri is a final-year B.Tech student in Electronics and Communication Engineering at GLA University, Mathura, with strong interests in Analog & RF Circuit Design, Semiconductor Fabrication, and Embedded Systems. His learning approach is hands-on, driven by curiosity and real-world implementation rather than just simulations.He has hands-on exposure to Analog CMOS Circuit Design using Cadence Virtuoso, including the design and simulation of a 2.5 GHz Low Noise Amplifier (LNA) with high gain and low noise performance. His technical foundation includes S-parameter analysis, RF fundamentals, filter design, and VLSI basics, along with embedded development using Embedded C, Arduino, and STM32.Astitva has gained practical semiconductor fabrication exposure through fabrication-oriented training and internships, where he worked on IC fabrication flow, clean room processes, lithography concepts, device-level understanding, and process-aware circuit thinking—strengthening his grasp of how designs translate from schematic to silicon.Currently, he is working at Sidwal Headquarters (Amber Enterprises India Pvt. Ltd.) as an R&D – Graduate Engineer Trainee, contributing to PCB design and layout, component selection, hardware testing, system-level validation, and product documentation. This role has enhanced his understanding of industry-grade electronics, reliability, and end-to-end product development.He has actively participated in national-level hackathons and technical competitions, including being a Top-20 Finalist in the Analog Design Hackathon 2025 (CDAC-C2S & Synopsys) among teams, where he worked on analog problem statements under real design constraints. He is also a SHILP Program Graduate (CEERI Pilani – CSIR Lab), gaining exposure to low-power and practical circuit design methodologies.Beyond technical work, Astitva plays an active leadership role under the Techtronica Society. He has served as the Former Vice President of the Technovation Club and is currently serving as the President of the Unnati Club, leading technical outreach, mentoring juniors, and organizing innovation-focused activities.His core strengths include Analog CMOS Design (Cadence Virtuoso), RF & Microwave Fundamentals, Semiconductor Fabrication Concepts, Low Noise Amplifier Design, Embedded Systems, PCB Design, and VLSI Fundamentals. He believes in learning by doing, building from silicon to system level, and growing through collaboration.Actively seeking opportunities in Analog/RF Design, Semiconductor Fabrication, and Core Electronics roles.

Experience

  1. Graduate Engineer Trainee

    Sidwal

    Nov 2025 — Present · Faridabad, IN

Education

  • Raja Balwant Singh (R.B.S.) College, Agra

    Polytechnic , Electrical, Electronics and Communications Engineering

    2020 — 2023

  • GLA University

    Bachelor of Technology - BTech, Electronics and Communication Engineering

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Astitva Johri — Graduate Engineer Trainee at Sidwal in Mathura, UP, IN | Unifers