Asim Kumar Patra

About Asim Kumar Patra

To obtain a challenging career in Full Custom Layout Design where I can become expert in designing optimized layouts using my technical knowledge, organizational skills, educational background and my ability to work well with people- Hands on experience with Custom Layout design and verification tools- Good understanding of full custom analog flow and CMOS Design operation- Can efficiently handle ICStudio from Mentor Graphics: Pyxis - Schematic and Layout Editor,Calibre - DRC/LVS checks- Have worked on technology nodes like 180nm, 90nm,28nm and 10nm- Ability to debug different DRC/LVS errors such as stamping conflict, incorrect nets andshorts- Good understanding of Device matching Techniques for analog circuits like interdigitization,dispersion,centroid matching- Knowledge of Latch-up, ESD, DFM,Antenna effects,Electromigration,Well proximity effects- Hands on experience of Verilog and verification using Questasim- Hardworking, Well organized, methodical, and detail oriented.

Experience

1. Component Design Engineer

   Intel

   Aug 2018 — Present · Bangalore, IN

Education

• Heritage Institute of Technology

  Master’s Degree, Microelectronics and VLSI Design

  2013 — 2015

• Eastern railway boys' h. s. school asansol

  10th

  2005 — 2006

• Eastern railway boys' h. s. school asansol

  10+2, Science

  2007 — 2008

• Imps College of Engineering and Technology

  Bachelor’s Degree, Electrical, Electronics and Communications Engineering

  2009 — 2013

Skills

• C++
• Perl
• Embedded Systems
• Eda
• Matlab
• Analog
• Microcontrollers
• C
• Programming
• Cmos
• Fpga
• Mentor Calibre
• Cadence Virtuoso
• Asic
• Microsoft Office
• Vlsi
• Physical Design
• Soc
• Integrated Circuit Design
• Microprocessors
• Vhdl
• Xilinx
• Systemverilog
• Semiconductors
• Drc
• Analog Circuit Design
• T-Spice
• Lvs
• Cadence
• Ic
• Rtl Design
• Static Timing Analysis
• Digital Electronics
• Linux
• Modelsim
• Verilog
• Pspice
• Debugging
• Xilinx Ise
• Electronics