Ashwin Prasanth Hariharan
AI Hardware & Accelerator Systems | FPGA • DSP • VLSI • Hardware–Software Co-Design | Embedded Systems | IIT Ropar • IIT Madras
- Role
- Def-space Tech Intern at Bharat Space Education Research Centre
- Location
- Coimbatore, TN, IN
- LinkedIn followers
- 500 followers
About Ashwin Prasanth Hariharan
Building efficient AI hardware and accelerator systems, spanning DSP pipelines, FPGA design, real-time data acquisition, and embedded intelligence.I focus on Digital Signal Processing (DSP) for system analysis, spectral methods, and efficient hardware implementation, along with FPGA design and embedded systems.My interest lies in translating machine learning models into efficient hardware through digital design, optimization, and hardware–software co-design.Upcoming FPGA Accelerator Intern @ National Chung Cheng University (CCU), Taiwan (Summer 2026), focusing on FPGA-based OTFS DSP architectures for 6G systems, including pipelined FFT/ISFFT design, streaming datapaths, and fixed-point optimization. Education:• B.Tech in Engineering Physics — IIT Ropar (2028)• BS in Electronic Systems — IIT Madras (2028)• Minor in CSE & Advanced Technologies — IIT Mandi (2025)• ACM India Winter School — Edge AI, IISc Bangalore (2026) Key Areas:• DSP-driven digital design and computation• FPGA-based signal processing and ML pipelines• ML-to-hardware mapping and quantization• Hardware–software co-design• Semiconductor fundamentals for efficient compute🧪 Selected Projects:• Designing FPGA-based OTFS modulation using delay–Doppler domain DSP pipelines and FFT/ISFFT architectures• Designing data acquisition and signal processing workflows using ADALM-M1K for real-time signal analysis and system characterization• Simulating semiconductor device and process behavior (MOSFET/FinFET) using Synopsys Sentaurus TCAD• Developed a real-time Edge AI pipeline on Raspberry Pi for posture monitoring, integrating pose detection models with embedded systems• Built ML pipelines from first principles (PCA, LDA, SVM, Bayesian models, KLDA) for industrial sensing systems, reducing sensor count by ~40% using Ant Colony Optimization (ACO) and mutual information-based optimization• Built embedded system pipelines for low-power sensing applications Interests:AI accelerators, FPGA-based systems, and efficient compute architectures for next-generation applications. Open to:Research collaborations and internships in AI hardware, FPGA systems, DSP, and embedded AI.
Experience
Def-space Tech Intern
Bharat Space Education Research Centre
Dec 2025 — Present · IN
Studied aerospace systems including rocketry, aerodynamics, UAVs, and robotics• Designed & analyzed a surveillance drone system with propulsion, airframe & sensor integration• Conducted a tail-sitting VTOL UAV design study, evaluating thrust, loads, and flight transitions• Explored PX4 and ArduPilot architectures, including autonomy stacks and fail-safe control strategies• Developed system-level understanding of UAV design and mission-driven engineering trade-offs
Education
Central Board of Secondary Education (CBSE)
High School Diploma, Science Mathematics and Computer Science
Clever Harvey
Junior MBA, Business Administration and Management, General
Indian Institute of Technology, Madras
Bachelor of Science - BS, Electronic Systems
FIITJEE
JEE (Mains and Advanced) , Physics, Chemistry and Mathematics
Indian Institute of Technology, Mandi
Minor in CSE and Advanced Technologies (CCE Program), Computer Science and Engineering
Indian Institute of Technology, Ropar
Bachelor of Technology - BTech, Engineering Physics
Indian Institute of Management Rohtak
Junior CTO, Product Management & Technology Leadership
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.