Ashvini Byri
SoC Performance Modeling Engineer
- Role
- Staff Engineer at WD
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Ashvini Byri
Over 10 years of experience as a Hardware Engineer specializing in Architecture Performance Modeling, with experience in identifying bottlenecks and improving performances- Successfully led the integration of NAND memory components and conducted comprehensive system simulations- Proven track record in driving performance measurements using Delphi- Extensive experience leading cross-functional teams for seamless system design integration and bottleneck troubleshooting- Skilled in the implementation of advanced system features for enhanced capabilities and robustness- Demonstrated proficiency in executing end-to-end traffic simulations on diverse architecture platforms- Proficient in leveraging performance measurement tools for detailed analysis of system performance metrics- Expertise in post-silicon DDR bring-up tests and implementing DDR read/write SHMOO for performance assessments- Proficient in multiple programming languages including Python, C++, C, Java, Perl, Verilog, VHDL, SystemVerilog, and well-versed with PCIe standards - Worked on tools like Trace32, Eclipse, Cadence Virtuoso, and Xilinx ISE- Continuous learner, seeking to expand expertise in post-silicon validation- Committed to consistently delivering high-quality results in SoC design, performance analysis, and memory validation- Open to networking with like-minded professionals in the field of hardware engineering and technological innovation.
Experience
Staff Engineer
Feb 2022 — Present · Milpitas, CA, US
Successfully led the NAND memory/feature bring-up process, ensuring seamless integration and functionality within the overall system design- Collaborated with cross-functional teams to identify and resolve NAND memory-related issues, optimizing performance and reliability- Implemented rigorous testing methodologies and validation procedures for NAND memory, resulting in improved product quality and reduced time-to-market- Conducted comprehensive end-to-end traffic simulations on diverse architecture platforms, providing valuable insights into system behavior and performance under varying conditions- Leveraged the Delphi toolset to drive performance measurements, enabling accurate and detailed analysis of system performance metrics- Customized performance measurement methodologies using Delphi, providing enhanced visibility into critical system parameters and bottlenecks.
Education
University of Southern California
Master's degree, Electrical and Electronics Engineering
2012 — 2014
Vidyalankar Institute of Technology
Bachelor of Engineering, Electronics and Telecommunications
2008 — 2012
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