Ashish Agrawal
Silicon Technologist, Components Research, Intel Corporation
- Role
- Sr Device Engineer at Intel
- Location
- Hillsboro, OR, US
- LinkedIn followers
- 500 followers
Experience
Sr Device Engineer
Dec 2014 — Present · Hillsboro, OR, US
R&D in semiconductor Front-end materials and physics, lead electrical characterizationengineer with strong background in device physics and material science• Design-Technology Co-Optimization (DTCO) analysis of novel materials, device andarchitecture for future scaled technology nodes
Education
Penn State University
Master of Science (M.S.), Electrical Engineering
2009 — 2011
Penn State University
Doctor of Philosophy (Ph.D.), Electrical Engineering
2011 — 2014
Visvesvaraya National Institute of Technology
B. Tech, Electrical, Electronics and Communications Engineering
2005 — 2009
Skills
- Semiconductors
- Semiconductor Device
- Labview
- Matlab
- C++
- Afm
- Characterization
- Photolithography
- Physics
- Thin Films
- Simulations
- Semiconductor Fabrication
- Device Characterization
- Compound Semiconductors
- C
- Materials Science
- Microfabrication
- Scanning Electron Microscopy
- Silicon
- Nanotechnology
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.