Ashish Kumar Singh
Silicon Design Engineer @ Altera | Ex-Intern @ Intel | NIT Rourkela
- Role
- Silicon Design Engineer at Altera
- Location
- Moradabad, UP, IN
- LinkedIn followers
- 500 followers
About Ashish Kumar Singh
I\'m a dedicated and passionate student specializing in VLSI Design and Embedded Systems, I am on a journey to explore the exciting world of semiconductor technologies and digital circuitry. My academic pursuits at NIT Rourkela have equipped me with a strong foundation in both front-end and back-end domains of VLSI Design. Throughout my coursework, I worked with laboratory equipment, completed ASIC and FPGA design flows, and developed and in depth understanding of the design and verification concepts. I am eager to apply my knowledge in practical settings. CORE EXPERTISE-Digital VLSI Design-Verilog HDL-System Verilog -UVM-Static Timing Analysis-Low Power VLSI Design-Analog and Mixed Signal VLSI Circuits-Testing and Verification-Tools Used: Xilinx-Vivado, Tanner EDA, Cadence and Synopsys design tools,QuestaSimI am open to connecting with fellow VLSI enthusiasts, industry professionals, and mentors who can help me further my understanding and network in this dynamic field.
Experience
Silicon Design Engineer
Sep 2025 — Present
Education
Galgotias College of Engineering and Technology
Bachelor of Engineering - BE, Electrical and Electronics Engineering
Kendriya Vidyalaya (KV)
Intermediate
National Institute of Technology Rourkela
Master's degree, Vlsi and embedded systems
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.