Ashish Ojha
- Role
- Analog Design Engineer at Texas Instruments
- Location
- Bengaluru, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Analog Design Engineer
Mar 2018 — Present
Skills
- Algorithms
- Verilog
- Analog Circuit Design
- Computer Architecture
- Matlab
- Perl
- Very-Large-Scale Integration (Vlsi)
- C
- Vhdl
- Cadence Virtuoso
- Vlsi
- Robotics
- Analog Circuits
- Verilog-a
- Embedded Systems
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.