Ashish Khandelwal
GPU architecture and PPA
- Role
- Principal Engineer at Samsung Semiconductor
- Location
- San Diego, CA, US
- LinkedIn followers
- 500 followers
About Ashish Khandelwal
I am working in semiconductor industry as a gpu performance verification engineer.I have successfully worked on complex SOC verification. IP verification,Creating verification environment, eVC/UVC development. gpu performance dvSpecialties: Domain:GPU, VLSI/ASIC,Digital/mix-signal verification.Languages: VHDL, Verilog, e-language, C/C++, system verilogScripting language: PERLOperating system: Windows, Solaris, LinuxExposure: GPU, OMAP platform, USB, OCP, AHB, SAS/SATA protocols, SAS/SATA PHY, x8086 Power Management etc.Tools: Modelsim,nanosim, Cadence schematics, Ncsim, VCS etc.
Experience
Principal Engineer
Feb 2026 — Present · San Diego, CA, US
GPU architecture and PPA
Education
IET Lucknow
B. Tech, Electronics
2001 — 2005
Skills
- Asic
- Vhdl
- Specman
- Bfms
- Verilog
- Evc
- Uvm
- Reference Models
- Soc
- Sv
- Perl
- System on a Chip (Soc)
- Debugging
- Gate Level Simulation
- C
- Vlsi
- Rtl Design
- Amba Ahb
- Cadence
- Application-Specific Integrated Circuits (Asic)
- Modelsim
- Sas/Sata
- Assertions
- Functional Verification
- Systemverilog
- Power Management
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