Ashfan Vahora

About Ashfan Vahora

Results-driven Digital IP Design Engineer with a proven track record in RTL development, IP integration, and functional safety for advanced semiconductor products. At NXP, delivered robust digital IP solutions for automotive and industrial applications, led formal verification and coverage closure, and contributed to innovative design ideas resulting in patent filings and defensive publications. Recognized for technical leadership, process automation, and effective cross-team collaboration. Prior experience at Schweitzer Engineering Laboratories (SEL) includes hardware and FPGA design, RTL development, and supporting product innovation for power system protection and automation.

Experience

1. Senior Rtl Design Engineer

   NXP Semiconductors

   Apr 2024 — Present · Austin, TX, US

Education

• Texas A&M University-Kingsville

  Master’s Degree, Electrical Engineering

  2015 — 2018

• C.V.M.Higher Secondary Complex(Science Stream)

  High School, Science Stream

  2008 — 2010

• Dr. Jivraj Mehta Institute of Technology

  Bachelor of Engineering (B.E.), Electronic and Communication Engineering

  2010 — 2014

• I.B.Patel English School

  High School

  1996 — 2008

Skills

• Xilinx Ise
• Intel 8085
• Intel 8051
• Assembly Language
• Systemverilog
• Nanoelectronics
• Magic Layout Design Software
• Ltspice
• Static Timing Analysis
• Matlab
• Research
• Tina Circuit Simulator
• Application-Specific Integrated Circuits (Asic)
• Keil
• Perl
• Embedded Systems
• Very-Large-Scale Integration (Vlsi)
• Simulink
• Verilog
• Vhdl
• Teamwork
• Digital Logic Design
• Advance Computer Architecture
• Python
• Proteus
• Integrated Circuit Design
• Microsoft Word
• Electronics
• Field-Programmable Gate Arrays (Fpga)
• System on a Chip (Soc)
• Eagle Pcb
• Cadence Schematic Capture
• Digital Signal Processing
• Altera Quartus
• C++
• Project Management
• Modelsim
• Ni Multisim
• Microsoft Powerpoint
• Speech Processing