Ashana Singh
SoC Design Engineer at Intel Corporation
- Role
- Soc Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Ashana Singh
Experienced Physical Design Engineer with a demonstrated history of working in the semiconductors industry. Skilled in PNR, Static Timing Analysis, CMOS, ASIC design, ICC2, TCL and Unix. Strong engineering professional with a M.Tech focused in Microelectronics and VLSI DESIGN from National Institute of Technology Calicut.
Experience
Soc Design Engineer
Nov 2021 — Present · Bengaluru, IN
Education
National Institute of Technology Calicut
M.Tech
2016 — 2018
Madan Mohan Malaviya University of Technology
B.Tech
2010 — 2014
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