Ashutosh Jain

Sr Silicon Design Engineer @AMD

Markham, ON, CA

o Delivered two high-performance server-class SoCs during tenure, owning full IP-to-SoC integration and sign-off responsibilities.o Integrated the NBIF (Northbridge Interface) IP module into a next-generation server SoC, managing all connectivity, configuration, and interface requirements.o Ensured successful sign-off through comprehensive verification, including RTL–netlist equivalence checking, lint, CDC, and formal analysis.o Collaborated with architecture, DFT, and backend teams to define integration logic, resolve interface mismatches, and close timing across multiple clock/reset domains.o Authored detailed integration documentation and block-level handoff reports to support downstream hardware, DFT, and verification teams.o Provided technical training to verification and validation teams by articulating design intent, protocol behavior, and integration strategy.o Mentored new interns by facilitating onboarding, setting performance goals, and conducting demo-based training sessions aligned with AMD methodology.o Supported SoC-level bring-up through simulation, waveform debugging, and collaborative design validation.

Global Institute of Technology

Bachelor of Technology (B.Tech.), Electronics and Communications Engineering

Illinois Institute of Technology

Master of Science (M.S.), Electrical Engineering - VLSI and Microelectronics