Arya S Das
Passionate Entry-Level Professional Seeking Verification Opportunities with Proficiency in Verilog, SystemVerilog, and UVM.
- Role
- Soc Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Soc Design Engineer
Aug 2022 — Present · Bengaluru, IN
Education
Manipal School of Information Sciences
Master of Engineering - ME, VLSI Design
Nirmala Rani High School - India
High School
2013
Rajarajeswari College of Engineering(RRCE)
Bachelor of Engineering - BE, Electrical, Electronics and Communications Engineering
2015 — 2019
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