Arvind Srinivasan

About Arvind Srinivasan

Highly motivated and innovative engineer with background in Industrial and Materials engineering, and proven experience in reliability engineering, process development, statistical analysis, material characterization, failure analysis and hands-on experience in electronics assembly.

Experience

1. Process Development Engineer (Space Photovoltaics for Leo Satellites)

   Universal Instruments Corporation

   Jul 2024 — Present · Conklin, NY, US

   Assisted in developing and optimizing state of the art process technologies to improve the optical, mechanical and electrical quality of solar cell modules in prototype phase. Helped in transferring the technology to high volume production.• Developed DOE for interconnect material selection and optimized thermal profiles to process these materials. Performed metallography analysis to investigate the morphology of different interconnect materials and utilized image processing techniques to determine root cause of process failures.• Developed experiments to minimize die attach voiding from approximately 50% to less than 15% by utilizing robust DOE methodologies to evaluate the effects of adhesive rheology and viscosity.• Performed extensive study on the interconnect print process parameters and process design, analyzed the results using microscopy techniques and statistical methodologies to mitigate cell cracks; thereby resulting in better thermal cycling performance and product reliability.• Investigated the effect of warpage on interconnect process reliability and analyzed the stress experienced by the module during the sinter cure process by utilizing Shadow moire interferometry technique.• Performed defect characterization and root cause failure analysis on process and thermal cycling failures using optical, mechanical and electrical characterization tools like SEM, EDS, FTIR, Xray CT, EL, PL, I-V, resistance and optical microscope, and created action plans to improve product yield and module efficiency.• Performed chemical decapsulation on LED MOSFETs and microprocessors for die-level failure analysis.• Performed Au plating thickness measurement using XRF.

Education

• PSG College of Technology

  Bachelor of Engineering (BE), Production Engineering (Sandwich Course)

  2008 — 2013

• Auburn University

  Master of Science - MS, Materials Science

• Auburn University

  Master of Engineering (M.E), Industrial Engineering

  2018

• Auburn University

  Doctor of Philosophy - PhD, Industrial Engineering

  2018

• Bharathi Matriculation Higher Secondary School

  High School, Science

  2005 — 2006

• Bharathi Matriculation Higher Secondary School

  Higher Secondary

  2007 — 2008

Skills

• Fmea
• Solidworks
• Team Management
• Microsoft Office
• Root Cause Analysis
• Finite Element Analysis
• Kaizen
• Kanban
• Product Development
• Analysis
• Matlab
• Lean Manufacturing
• Ptc Creo
• Ansys
• Engineering
• Photoshop
• Spc
• 5s
• Manufacturing
• Catia
• Microsoft Word
• Quality Control
• Autocad
• Six Sigma
• A3
• Microsoft Excel
• Powerpoint
• Cad