Arvind Singh
Physical Design Engineer at Arm | Ex-Intel
- Role
- Cpu Physical Design Engineer at Arm
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Arvind Singh
Physical Design Engineer with experience on partition design and Implementation from synthesis to PNR. RTL to GDSII flow. Hands-on experience with High speed & low power designs. Good knowledge of physical design flow and tools like DC, ICC2, FC, genus, Innovus. Timing report analysis, setting the timing and power constraint for synthesis and sign-off STA. Logic Equivalence checking for RTL to Netlist, Post-Layout timing analysis, generating timing ECOs for partition level timing closure. Have worked on multiple tape-out of multi-million gates in 14nm, 10nm, 7nm process node.
Experience
Cpu Physical Design Engineer
Jun 2023 — Present · IN
Education
J.C. Bose University of Science and Technology, YMCA
Bachelor of Technology (BTech)
Skills
- C
- Visio
- Linux Kernel
- Linux
- Modelsim
- Microsoft Word
- Matlab
- Data Structures
- Working on Radar
- Vhdl
- Microsoft Power Point
- Shell Scripting
- Xilinx
- Weather Radar
- Embedded C
- Microsoft Excel
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