Arun Chaudhary
FPGA | ASIC | RTL | Embedded | SoC | Design | SDK | Vitis | CDC | Lint | IP | SPI | I2C | UART | Ethernet | Verilog | VHDL | System verilog
- Role
- Silicon Design Engineer at AMD
- Location
- Ghaziabad, UP, IN
- LinkedIn followers
- 500 followers
About Arun Chaudhary
Hi,I am Arun,Electronics And Communication Engineering Graduate.Trained FPGA RTL Design And Verification. Having good knowledge in Digital Design,Hardware Language and scripting.Knowledge of design creation using Vivado,Quartus using stratix 10,Agilex,Zynq,Zedboard,Vertext,kintext.Exploring new tools for CDC and Lint - Synopsis Spyglass Design tool - Intel quartus software prime Working with - 1G /10G 40 G and 100G ethernet ip RTL FPGA DESIGN ENGINEER Currently working on the project of 4k video processing.
Experience
Silicon Design Engineer
Dec 2022 — Present · Hyderabad, IN
Contractor
Education
Mangalprasad Higher Secondary School
+2, Physical Sciences
2011 — 2012
Chitkara University
Bachelor of Engineering - BE, Electrical, Electronics and Communications Engineering
2014 — 2018
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