Arpit Kapoor
Power Analysis and Optimization @ Google
- Role
- Senior Silicon Architect at Google
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
Information TechnologyView LinkedIn profile
Experience
Senior Silicon Architect
Nov 2023 — Present · Bengaluru, IN
Education
Manipal Academy of Higher Education
MS
2010 — 2012
Skills
- Parasitic Extraction
- Verilog
- Starrcxt
- Vlsi
- Hdl
- Very-Large-Scale Integration (Vlsi)
- Asic
- Modelsim
- Virtuoso
- Virtuoso Layout Editor
- Soc
- Logic Design
- Semiconductors
- Functional Verification
- Integrated Circuit Design
- Lvs
- Perl
- Eda
- Cmos
- Physical Design
- Cadence Virtuoso
- Eldo Simulator
- System on a Chip (Soc)
- Rtl Design
- Application-Specific Integrated Circuits (Asic)
- Layout Tools
- Static Timing Analysis
- Hardware Description Language
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