Arpit Gupta

About Arpit Gupta

Technical Verification Leader with deep expertise in ARM-based SoC verification (Client & Server) and GPU-centric architectures. Proven track record of leading and mentoring verification teams while owning delivery from requirements and strategy to execution, coverage closure, emulation, and post-silicon validation.Strong hands-on experience with SystemVerilog + UVM, constrained-random verification, assertions, and coverage-driven methodologies. Led end-to-end system and unit-level verification of Tegra architecture, including debug and ARM RAS (error injection, detection, logging, reporting).Experienced in GPU and power-aware verification, validating power states, low-power scenarios, and complex clock/power domain interactions in high-performance SoCs.Actively leveraging AI-assisted engineering tools (Cursor, Claude Code) to accelerate verification development, automation, debug, and productivity.Known for hands-on technical leadership, driving efficiency through innovation, and mentoring high-performing system verification teams.

Experience

1. Senior Design Verification Lead

   NVIDIA

   Jun 2018 — Present · Bengaluru, IN

   Leveraging Cursor AI to accelerate verification by rapidly generating, refactoring, and debugging System Verilog/UVM code and automation scripts• Hands-on experience on verification methodologies (SV + UVM)• End-to-end system and unit level verification of the Tegra Architecture – from test planning to coverage closure as well as emulation, post-silicon validation• System level verification of the Debug Architecture - This included test planning, system level self-checking stimulus creation and debug, functional coverage coding and closure for Tegra architecture• Cluster level verification of ARM RAS architecture - Error generation, detection, logging and reporting• Expertise on constraints and assertions - Random verification• Hands-on experience in power-aware verification, validating power states, clock/power domain interactions, and low-power scenarios in complex SoCs• Regularly mentored and trained new hires and interns for the System Verification teams

Education

• National Institute of Technology Kurukshetra

  Bachelor of Technology (B.Tech.), Electronics and Communications Engineering

  2010 — 2014

Skills

• Functional Verification
• Microsoft Office
• Vlsi
• Rtl Design
• Photoshop
• Public Speaking
• Systemverilog
• English
• System on a Chip (Soc)
• C
• Strategic Planning
• Soc
• Debugging
• Verilog