Vinit Arora
RTL Design Engineer @ Google | Ex: Hardware Engineering Intern @ Google | Ex-ASIC Intern @eInfochips | Nirma University\'25 EC
- Role
- Rtl Design Engineer at Google
- Location
- Pali, RJ, IN
- LinkedIn followers
- 500 followers
About Vinit Arora
With a solid foundation in Electronics and Communications Engineering, my expertise spans semiconductor technology, hardware design, VLSI (Very Large Scale Integration), and machine learning. I have gained practical experience in ASIC workflows, advanced EDA tools, and custom hardware design through academic projects and professional exposure. I have also worked on machine learning projects, applying AI techniques to address practical challenges effectively.I am passionate about solving challenges in processor design and advancing technology through innovation in electronics, VLSI design, and machine learning.
Experience
Rtl Design Engineer
Aug 2025 — Present · Bengaluru, IN
Education
Nirma University, Ahmedabad
Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering
2021 — 2025
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.