Arnab Saha

About Arnab Saha

Skilled in Analog Circuit Design, Mixed Signal, Integrated Circuit Design. Strong Engineering Professional with 6.5+ years of industry experience in A & MS IC Design. • Cross-functional collaboration, project planning and coordination skills • Design experience in high-speed SerDes PHYs at leading-edge CMOS FinFET technology nodes • Experience in design of analog mixed-signal blocks including Amplifiers, ADCs (Delta-Sigma, SAR, Pipeline), DACs, Phase Locked Loop (PLL), Oscillator, Spread-Spectrum Clock Generator, Phase Detector, Clock Receivers, Delay Line, IQ Modulation, LDO Voltage Regulator, Bandgaps, Low-Noise Front-Ends, Voltage and Current References, LED Driver, TransImpedance Amplifier (TIA), High-Voltage Transmitter, Analog Filters, and Comparators Design Flow: Schematic Entry, MonteCarlo, PVT sims, QRC, DRC/LVS, EM/IR Tools: Cadence Virtuoso ADE, Spectre/X/APS, Calibre, MATLAB, Layout Suite Programming Languages: C/C++, Python, Verilog, Verilog-A, SKILL

Experience

1. Lead Design Engineer

   Cadence

   Oct 2024 — Present

   SerDes/IO - High-speed analog design

Education

• University of Michigan

  Master of Science - MS

• National Institute of Technology Tiruchirappalli (NIT Trichy)

  Bachelor of Technology - BTech

  2013 — 2017