Arjav Dave

Senior Design Verification Engineer @新思國際科技有限公司

San Jose, CA, US
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Feb 2023 — Present

Senior Design Verification Engineer @新思國際科技有限公司

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San Jose, CA, US

EDUCATION

2018 — 2020

San José State University

Master of Science - MS, Electrical and Electronics Engineering

2011 — 2013

St. Xavier's High School Gandhinagar

higher secondary, Human Resources Management/Personnel Administration, General

2013 — 2017

Nirma Institute Of Technology

Instrumentation and Control

SKILLS

Digital Image ProcessingEmbedded SystemsMicrosoft ExcelMatlabOpencvPythonNi LabviewArm Cortex-MCMysqlArduinoRaspberry PiM4Microsoft Office

ABOUT ARJAV DAVE

MS in Electrical and Electronics Engineering.Specialization in digital design and Verification.I am a detail-oriented graduate student (MS in Electrical Engineering) currently attending San Jose State University. I am an ASIC/SoC Design Verification enthusiast who likes to work on complex Protocol and RTL design Verification projects. I have 3 months of industry experience in Post Silicon Validation at Xilinx. I worked closely with Senior Design Engineers and cross-functional teams and accomplished complex scripting tasks with voltage and frequency shmooing of memory cells. I also developed automation flow required to speed up the testing process (PVT) in pythonI also have eight months of experience as an Embedded Software Developer for Nakalank Microelectronics. Being a part of a startup firm, I was given the whole task of software development. I was majorly involved in the process of preparing a proof of concept, development, and testing of the software along with the hardware interface for the embedded product. During my tenure, I managed to complete the software development of four products on time along with timely upgradation and maintenance. If you are interested in working with someone who utilizes state-of-the-art methodologies to successfully complete projects, email me at a••••••••@gmail.com. Specialties: UVM, SystemVerilog, Verilog, C++, OOPs, AXI, APB, AHB, CPU Architecture, STA, Functional Coverage, Code CoverageWhile not working I enjoy reading spiritual books and trail walking.

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