Aritra Bhattacharyay
Staff Engineer, R&D Engineering @ Synopsys | RTL Design & Verification, FPGA Emulation | AI & Machine Learning | Ph.D. @ The University of Florida
- Role
- Staff Engineer, R & d Engineering at 新思科技股份有限公司
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Aritra Bhattacharyay
5 years of experience in digital logic (ASIC/FPGA) design and verification using EDA, and CAD tool development with a PhD degree focusing on secure hardware design- Focused on developing several fully automated tool and regression framework which will be integrated in commercial EDA flows- Hands on experience in IP design and verification- Passionate to utilize the existing set of skills and explore new opportunities for skill development in design, verification, and implementation of GPU/CPU/SoC.Expertise lies in the following areas- Hardware IP design, simulation, and verification targeting IP security and trust- SoC level integration and simulation of IP blocks- Verilog/VHDL- SystemVerilog (UVM/SVA)- Tcl, Python scripting- C/C++ programming- Synopsys EDA tools- Cadence EDA tools- Intel (Altera) Quartus- Xilinx ISE and VivadoVisit my google scholar page at & hl=en
Experience
Staff Engineer, R & d Engineering
Nov 2024 — Present · Bengaluru, IN
Education
University of Florida
Master of Science - MS, Computer Engineering
Delhi Public School New Town
ISC
2006 — 2015
University of Florida
Doctor of Philosophy - PhD, Electrical and Computer Engineering
Kalinga Institute of Industrial Technology, Bhubaneswar
Bachelor of Technology (BTech), Computer Science
2015 — 2019
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