Arghya Bishal
Semiconductor Process Leader | Thin Film Metrology Optimization & Process Integration | Yield Improvement & Ramp Execution | Driving Cross-Functional Impact | PhD
- Role
- Senior Process Development Engineer at Intel
- Location
- Portland, OR, US
- LinkedIn followers
- 500 followers
About Arghya Bishal
Semiconductor senior process engineer with 8+ years of experience in advanced technology development and high-volume manufacturing environments, supported by a PhD in Materials Science and Surface Engineering. Specialized in thin film process development, overlay and defect metrology, and nanoscale characterization for advanced technology nodes. Experienced in driving process optimization from pathfinding through production ramp, with focus on yield improvement, variation reduction, and manufacturability. Strong background in DOE-driven experimentation, root cause analysis, and cross-functional technical collaboration across lithography, integration, device, and manufacturing teams. Proven ability to translate complex nanoscale material behavior into robust, scalable process solutions. Technical expertise includes- Thin film deposition (ALD, CVD) and CMP process integration - Overlay, OCD/CD, and inline defect metrology - Spectral ellipsometry, SEM/TEM, XPS, XRD, Raman characterization - Process control strategies, SPC, and data-driven optimization - Statistical Data analysis: JMP, SQL Seeking opportunities to drive broader technical leadership, cross-functional alignment, and next-generation technology scaling in advanced semiconductor environments.
Experience
Senior Process Development Engineer
Aug 2022 — Present · Hillsboro, OR, US
Advanced Lithography & Overlay Metrology- Lead overlay metrology development for advanced logic technology nodes, enabling sub-nanometer alignment control during technology ramp- Drive cross-functional collaboration across lithography, integration, and manufacturing to improve overlay accuracy and reduce variation- Design and execute DOE-based process optimization strategies to tighten overlay control and improve yield- Own metrology qualification, tool matching, and control strategy development to ensure manufacturability at high volume- Support technology pathfinding through early-stage process characterization and scaling readiness assessments.
Education
University of Illinois Chicago
Doctor of Philosophy (Ph.D.), Bioengineering and Biomedical Engineering
2013
West Bengal University of Technology, Kolkata
Bachelor of Technology (B.Tech.), Biotechnology
2009 — 2013
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