Akash Ardeshana

About Akash Ardeshana

VLSI Passionate with 9+ years of Fronted Design & Verification experience.> Working on verification of MDB IP at Renesas> Worked on SoC verification targeting MEM domain (DDR5DIMM, MRDIMM) at Intel> Worked on Memory model development and verification of memory interfaces like OSPI, xSPI(JEDEC), spiNAND, ONFI, Hyperram, Octaram and DDR5 at Cadence.> Worked on SV/UVM verification, RTL coding, FPGA based validation & brief knowledge on Emulation at ISRO.> Masters degree in VLSI with dissertation on NAND flash Controller(ONFI) design at CDAC-ACTS and Published a paper at conference for the same.

Experience

1. Staff Engineer

   Renesas Electronics

   Jul 2024 — Present · Bengaluru, IN

   DDR5 Memory Interface IP Verification - MDB(MRDIMM)

Education

• A. Z. Kaneria High school, Dhoraji

  8 to 12, Science

  2004 — 2009

• Dharmsinh Desai University

  Bachelor of Technology (B.Tech.), Electronics & Communication

  2009 — 2013

• Gujarat Technological University (GTU)

  Masters of Engineering, VLSI & Embedded Systems Design

  2014 — 2016

Skills

• Xilinx
• Vhdl
• Gprs
• Linux
• Modelsim
• C
• Verilog
• Fifo
• Microsoft Office
• Vlsi
• 3g
• Gsm
• C++
• Telecommunications
• Embedded Systems
• Fpga
• Socket Programming
• 2g
• Very-Large-Scale Integration (Vlsi)
• Embedded C
• Field-Programmable Gate Arrays (Fpga)
• Visual Basic
• Computer Architecture
• Digital Electronics
• Dft
• Matlab
• Microsoft Excel
• Microcontrollers