Aravindhan Balakrishnan
Lead Engineer - Design & Verification
- Role
- Lead Engineer at Qualcomm
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Aravindhan Balakrishnan
8.5 years of Experience in ASIC/FPGA RTL Design, Verification and Emulation with a demonstrated history in semiconductor industry.Have profound knowledge in LPDDRs, DDRs, Serial, AMBAs and Camera control IPs. Protocols worked - CHI, APB, AHB, AXI, LPDDR2/4/5, DDR2/3/4/5, SPI, I2C and interconnects.Experienced in tools like Xlilinx Vivado, Questasim, NC, VCS, Lint, Spyglass Synthesis, CDC, T32 and emulators like Palladium, Veloce.Experienced in ASIC/FPGA RTL Design, SV/UVM based testbench development, ASIC/FPGA Verification, SoC/IP integration, Simulation acceleration, Coverage driven VerificationExperienced in Verilog, SystemVerilog, UVM, Perl, TCL, C++.Strong engineering professional with a BE (ECE) focused in Electrical, Electronics and Communications Engineering from Mepco Schlenk Engg. College.
Experience
Lead Engineer
Jan 2024 — Present · Bengaluru, IN
Camera IP/Core verification for Mobile, Compute & Auto
Education
Mepco Schlenk Engg. College
BE (ECE), Electrical, Electronics and Communications Engineering
2013 — 2017
St pauls' matric higher secondary school, Kovilpatti
Higher secondary
2011 — 2013
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