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Aravinda Acharya

ASIC Design for Testability Engineer

Role
Asic Design for Testability Engineer at Google
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers
EngineeringView LinkedIn profile

Experience

  1. Asic Design for Testability Engineer

    Google

    Apr 2022 — Present · Bengaluru, IN

Education

  • Manipal Centre For Information Science

    MS, VLSI-CAD

    2009 — 2011

  • Visvesvaraya Technological University

    BE, Electronics and Communication

    2003 — 2007

Skills

  • Asic
  • Static Timing Analysis
  • Integrated Circuit Design
  • Perl
  • Eda
  • Atpg
  • Dft
  • Vlsi
  • Verilog
  • Ncsim
  • Logic Design

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Aravinda Acharya — Asic Design for Testability Engineer at Google in Bengaluru, KA, IN | Unifers