Aravind Sai Ravula

# Sr Physical Design Engineer @Qualcomm

Role
Senior Engineer at 高通
Location
Hyderabad, TG, IN
LinkedIn followers
500 followers

About Aravind Sai Ravula

Physical Design Engineer *Worked on 2nm to 180nm designs * Hands on experience…

Experience

  1. Senior Engineer

    高通

    May 2024 — Present · Hyderabad, IN

Education

  • KHIT,JNTUK

    Bachelor's degree

    2013 — 2017

  • VEDA IIT,JNTUH

    Master's degree

    2018 — 2020

  • Andhra Pradesh Residential Jr College, Nagarjuna Sagar

    Intermediate

    2011 — 2013

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Aravind Sai Ravula — Senior Engineer at 高通 in Hyderabad, TG, IN | Unifers