Apurv Vivek

About Apurv Vivek

Actively looking for Performance Engineering roles A motivated and determined…

Experience

1. Senior Performance Architect at Samsung Austin Research Center

   Samsung Electronics

   Nov 2017 — Present · Austin, TX, US

   Workload Analysis (Microarchitectural Deep-Dives) Performed workload characterization and identified performance bottlenecks in CPU and in software (compiler and OS) across a wide range of workloads. Used cycle accurate simulations, sensitivity studies, performance counter analysis, pipeline crawls, data mining on performance logs and assembly code analysis to identify performance bottlenecks.Workload Optimization Found implementation and performance issues in the code for various workloads Gave feedback to partner companies on improving code for their benchmarksPerformance Modelling: Demonstrated performance improvement using the performance simulator Implemented new micro-architectural features on the Load Store Unit and the Branch Predictor. Identified branch patterns across thousands of traces and improved the main branch predictor algorithm based on the findings. Modeled fake instruction handling in the instruction decode section of the performance model.Competitive Analysis Explained the performance deltas on various benchmarks between SARC and competitor CPUs. Analyzed instruction traces, perf profiles, hardware counters, systraces, and created directed tests to explain performance deltas.Tracing workloads and Trace manipulation (via trace morphing) Helped generate instruction traces on the emulator for various workloads. Tweaked the trace reader to do compiler optimizations on the instruction trace.Correlation between performance model and RTL Identified differences between the implementation of the FP Scheduler and the FP Pipe on the performance model and RTL.

Education

• JSSATEN

  Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering

  2008 — 2012

• Georgia Institute of Technology

  Master of Science (M.S.), Electrical and Computer Engineer

  2013 — 2014

Skills

• C++
• Atmel Avr
• Robotics
• Cadence Virtuoso Layout Editor
• C/C++
• Matlab
• Cadence Virtuoso
• Vlsi
• Modelsim
• Application-Specific Integrated Circuits (Asic)
• Assembly Language
• Low Power Design
• Digital Hardware Design and Verification
• Computer Architecture
• Asic
• Pcb Design
• Fpga Xilinx Spartan
• Verilog
• Shell Scripting
• Perl
• Eda